更新于 2026-08-15电气特性 Features
| Type: | PLL Clock Synthesizer |
| Family: | 9LRS3187 |
| Number of Elements per Chip: | 3 |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 14.318 MHz |
| Maximum Input Frequency: | 15 MHz |
| Rad Hard: | No |
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电气特性 Features
电气特性 Features
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 12.4 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 100 W |
| Connector Type: | N |
| Attenuation Tolerance: | ±1.2 dB |
| Maximum Attenuation: | 25(Typ) dB |
| Maximum VSWR: | 1.25 |
| Rad Hard: | No |
| Family: | R414.725.000 |
电气特性 Features
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 3 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 1 W |
| Connector Type: | TNC |
| Attenuation Tolerance: | ±0.5 dB |
| Maximum Attenuation: | 2(Typ) dB |
| Maximum VSWR: | 1.3 |
| Rad Hard: | No |
电气特性 Features
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 12.4 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 100 W |
| Connector Type: | TNC |
| Attenuation Tolerance: | ±1.3 dB |
| Maximum Attenuation: | 40(Typ) dB |
| Maximum VSWR: | 1.3 |
| Rad Hard: | No |
| Family: | R414.540.000 |
电气特性 Features
| Category: | Receiver |
| Operating Band Frequency: | 314.8 to 315.2 MHz |
| Maximum RF Operating Frequency: | 315.2 MHz |
| Modulation Technique: | OOK |
| Operating Supply Voltage: | 3.3 V |
| Rad Hard: | No |